SiFive launches second-generation smart core to improve AI accelerator performance

The latest AI-based facility summit, chip design company SiFive launched the second generation of smart core, focusing on AI, such as robot sensors. SiFive These RISC-V architecture cores not only apply to Internet equipment, but also can be used in high-level AI accelerators, including Google POWER processing unit (TPU) and Tenstorrent Blackhole accelerators.

SiFive's latest smart cores X160 and X180 are designed for low-power applications, the X180 is a 64-bit core, and the X160 is based on a 32-bit RV32I instruction set architecture. Both cores are 128-bit vector registers and 64-bit data channels, supporting modern data types such as INT8 and BF16, and adopting eight-stage super-pure flow lines, which can emit double instructions at the same time to improve computing efficiency. The core can be arranged in up to four clusters, supporting high-frequency wide vector processor interface expansion (VCIX).

SiFive also introduced the standard processor interface (SSCI) to enable the accelerator to directly access CPU registers and improve the accelerator's cooperation with the CPU.

SiFive's X280 and X390 series processor cores have also been upgraded, and the X390 Gen 2 has greatly improved computing power and data throughput. The quad-core cluster has achieved up to 1TB of data movement per second, and is suitable for independent edge AI processing or as an accelerator control unit (ACU).

SiFive's second-generation XM series AI accelerator IP has also been upgraded, combining the matrix mathematical engine and four updated X390 cores. 2GHz provides FP8 performance of 64 teraFLOPS, and can be extended to more than 4 petaFLOPS AI performance, suitable for large-scale AI models. The new core and accelerator are licensed, and the first chips based on these designs will be available in the second quarter of 2026.

SiFive has launched a high-performance RISC-V processor P870-D for data centers and basic facilities in 2024, supporting AMBA CHI agreements, high core data expansion, and meeting the needs of audio and video streaming, storage and Web services and computing.

SiFive aims to cram more RISC-V cores into AI chips SiFive introduces 2nd Gen Intelligence RISC-V AI CPUs: X160, X180, X280 Gen 2, X390 Gen 2, and XM Gen 2 SiFive enhances RISC-V IP with new features and upgrades